Connectors, Tracing

schema/max-7seg-clock/max-7seg-clock-cache.lib

@@ -43,22 +43,46 @@ X F 9 -300 -200 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
-# Connector_Generic_Conn_01x02
+# Connector_Generic_Conn_01x05
 #
-DEF Connector_Generic_Conn_01x02 J 0 40 Y N 1 F N
+DEF Connector_Generic_Conn_01x05 J 0 40 Y N 1 F N
-F0 "J" 0 100 50 H V C CNN
+F0 "J" 0 300 50 H V C CNN
-F1 "Connector_Generic_Conn_01x02" 0 -200 50 H V C CNN
+F1 "Connector_Generic_Conn_01x05" 0 -300 50 H V C CNN
 F2 "" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
  Connector*:*_1x??_*
 $ENDFPLIST
 DRAW
+S -50 -195 0 -205 1 1 6 N
 S -50 -95 0 -105 1 1 6 N
 S -50 5 0 -5 1 1 6 N
-S -50 50 50 -150 1 1 10 f
+S -50 105 0 95 1 1 6 N
-X Pin_1 1 -200 0 150 R 50 50 1 1 P
+S -50 205 0 195 1 1 6 N
-X Pin_2 2 -200 -100 150 R 50 50 1 1 P
+S -50 250 50 -250 1 1 10 f
+X Pin_1 1 -200 200 150 R 50 50 1 1 P
+X Pin_2 2 -200 100 150 R 50 50 1 1 P
+X Pin_3 3 -200 0 150 R 50 50 1 1 P
+X Pin_4 4 -200 -100 150 R 50 50 1 1 P
+X Pin_5 5 -200 -200 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_C
+#
+DEF Device_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "Device_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 50 50 1 1 P
+X ~ 2 0 -150 110 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #

schema/max-7seg-clock/max-7seg-clock.pro

@@ -1,29 +1,10 @@
-update=Sa 12 Jun 2021 19:57:05 CEST
+update=So 01 Aug 2021 11:59:35 CEST
 version=1
 last_client=kicad
 [general]
 version=1
 RootSch=
 BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
 [cvpcb]
 version=1
 NetIExt=net
@@ -41,3 +22,228 @@ NetFmtName=Pcbnew
 SpiceAjustPassiveValues=0
 LabSize=50
 ERC_TestSimilarLabels=1
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.2
+MinViaDiameter=0.4
+MinViaDrill=0.3
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.25
+TrackWidth2=0.5
+ViaDiameter1=0.8
+ViaDrill1=0.4
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.12
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.05
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+SolderPasteClearance=0
+SolderPasteRatio=-0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
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+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
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+Name=In8.Cu
+Type=0
+Enabled=0
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+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
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+Name=In15.Cu
+Type=0
+Enabled=0
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+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
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+Type=0
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+Type=0
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+Type=0
+Enabled=0
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+Enabled=0
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+Name=In24.Cu
+Type=0
+Enabled=0
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+Type=0
+Enabled=0
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+Name=In26.Cu
+Type=0
+Enabled=0
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+Name=In27.Cu
+Type=0
+Enabled=0
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+Type=0
+Enabled=0
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+Name=In29.Cu
+Type=0
+Enabled=0
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+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=1
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=1
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=1
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=1
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.2
+TrackWidth=0.25
+ViaDiameter=0.8
+ViaDrill=0.4
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25

schema/max-7seg-clock/max-7seg-clock.sch

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 F 1 "Crystal" H 750 7127 50  0000 C CNN
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+F 2 "Crystal:Crystal_DS15_D1.5mm_L5.0mm_Vertical" H 750 6950 50  0001 C CNN
 F 3 "~" H 750 6950 50  0001 C CNN
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 Wire Wire Line
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@@ -1971,36 +1960,182 @@ Connection ~ 700  6050
 Wire Wire Line
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-F 1 "GND" H 1005 4977 50  0000 C CNN
+F 1 "Conn_01x05" H 7230 6051 50  0000 L CNN
-F 2 "" H 1000 5150 50  0001 C CNN
+F 2 "Connector_PinHeader_2.54mm:PinHeader_1x05_P2.54mm_Horizontal" H 7150 6100 50  0001 C CNN
-F 3 "" H 1000 5150 50  0001 C CNN
+F 3 "~" H 7150 6100 50  0001 C CNN
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-F 2 "Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical" H 1200 5050 50  0001 C CNN
+F 2 "" H 6950 6300 50  0001 C CNN
-F 3 "~" H 1200 5050 50  0001 C CNN
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+Text Label 6800 6100 0    50   ~ 0
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schema/max-7seg-clock/max-7seg-clock.sch-bak

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 F 3 "~" H 750 6950 50  0001 C CNN
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 	1    0    0    -1  
@@ -1971,36 +1971,121 @@ Connection ~ 700  6050
 Wire Wire Line
 	700  6050 850  6050
 $Comp
-L power:GND #PWR?
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-F 1 "GND" H 1005 4977 50  0000 C CNN
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-F 3 "" H 1000 5150 50  0001 C CNN
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-L power:+5V #PWR?
+L power:+5V #PWR04
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-F 3 "" H 1000 5050 50  0001 C CNN
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+	1    0    0    -1  
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+Wire Wire Line
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+Text Label 6800 6100 0    50   ~ 0
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+$Comp
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+$Comp
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+$EndComp
+$Comp
+L power:+5V #PWR02
+U 1 1 61242487
+P 950 4750
+F 0 "#PWR02" H 950 4600 50  0001 C CNN
+F 1 "+5V" H 965 4923 50  0000 C CNN
+F 2 "" H 950 4750 50  0001 C CNN
+F 3 "" H 950 4750 50  0001 C CNN
+	1    950  4750
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	950  4850 800  4850
+Wire Wire Line
+	950  4950 800  4950
+Wire Wire Line
+	950  5050 800  5050
+Text Label 800  4850 0    50   ~ 0
+DIN
+Text Label 800  4950 0    50   ~ 0
+CLK
+Text Label 800  5050 0    50   ~ 0
+CS
+Wire Wire Line
+	600  950  600  800 
+$Comp
+L Device:R R3
+U 1 1 612CD0AF
+P 600 650
+F 0 "R3" H 670 696 50  0000 L CNN
+F 1 "10k" H 670 605 50  0000 L CNN
+F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 530 650 50  0001 C CNN
+F 3 "~" H 600 650 50  0001 C CNN
+	1    600  650 
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:+5V #PWR01
+U 1 1 612CD5F0
+P 600 500
+F 0 "#PWR01" H 600 350 50  0001 C CNN
+F 1 "+5V" H 615 673 50  0000 C CNN
+F 2 "" H 600 500 50  0001 C CNN
+F 3 "" H 600 500 50  0001 C CNN
+	1    600  500 
 	1    0    0    -1  
 $EndComp
 $EndSCHEMATC