271 lines
8.5 KiB
C++
271 lines
8.5 KiB
C++
#include <Arduino.h>
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#include "ES8388.h"
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#include <Wire.h>
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#define ES8388_ADDR 0x10
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/* ES8388 register */
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#define ES8388_CONTROL1 0x00
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#define ES8388_CONTROL2 0x01
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#define ES8388_CHIPPOWER 0x02
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#define ES8388_ADCPOWER 0x03
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#define ES8388_DACPOWER 0x04
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#define ES8388_CHIPLOPOW1 0x05
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#define ES8388_CHIPLOPOW2 0x06
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#define ES8388_ANAVOLMANAG 0x07
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#define ES8388_MASTERMODE 0x08
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/* ADC */
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#define ES8388_ADCCONTROL1 0x09
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#define ES8388_ADCCONTROL2 0x0a
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#define ES8388_ADCCONTROL3 0x0b
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#define ES8388_ADCCONTROL4 0x0c
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#define ES8388_ADCCONTROL5 0x0d
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#define ES8388_ADCCONTROL6 0x0e
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#define ES8388_ADCCONTROL7 0x0f
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#define ES8388_ADCCONTROL8 0x10
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#define ES8388_ADCCONTROL9 0x11
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#define ES8388_ADCCONTROL10 0x12
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#define ES8388_ADCCONTROL11 0x13
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#define ES8388_ADCCONTROL12 0x14
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#define ES8388_ADCCONTROL13 0x15
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#define ES8388_ADCCONTROL14 0x16
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/* DAC */
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#define ES8388_DACCONTROL1 0x17
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#define ES8388_DACCONTROL2 0x18
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#define ES8388_DACCONTROL3 0x19
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#define ES8388_DACCONTROL4 0x1a
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#define ES8388_DACCONTROL5 0x1b
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#define ES8388_DACCONTROL6 0x1c
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#define ES8388_DACCONTROL7 0x1d
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#define ES8388_DACCONTROL8 0x1e
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#define ES8388_DACCONTROL9 0x1f
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#define ES8388_DACCONTROL10 0x20
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#define ES8388_DACCONTROL11 0x21
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#define ES8388_DACCONTROL12 0x22
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#define ES8388_DACCONTROL13 0x23
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#define ES8388_DACCONTROL14 0x24
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#define ES8388_DACCONTROL15 0x25
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#define ES8388_DACCONTROL16 0x26
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#define ES8388_DACCONTROL17 0x27
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#define ES8388_DACCONTROL18 0x28
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#define ES8388_DACCONTROL19 0x29
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#define ES8388_DACCONTROL20 0x2a
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#define ES8388_DACCONTROL21 0x2b
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#define ES8388_DACCONTROL22 0x2c
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#define ES8388_DACCONTROL23 0x2d
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#define ES8388_DACCONTROL24 0x2e
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#define ES8388_DACCONTROL25 0x2f
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#define ES8388_DACCONTROL26 0x30
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#define ES8388_DACCONTROL27 0x31
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#define ES8388_DACCONTROL28 0x32
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#define ES8388_DACCONTROL29 0x33
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#define ES8388_DACCONTROL30 0x34
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bool ES8388::write_reg(uint8_t slave_add, uint8_t reg_add, uint8_t data)
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{
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Wire.beginTransmission(slave_add);
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Wire.write(reg_add);
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Wire.write(data);
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return Wire.endTransmission() == 0;
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}
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bool ES8388::read_reg(uint8_t slave_add, uint8_t reg_add, uint8_t &data)
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{
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bool retval = false;
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Wire.beginTransmission(slave_add);
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Wire.write(reg_add);
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Wire.endTransmission(false);
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Wire.requestFrom((uint16_t)slave_add, (uint8_t)1, true);
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if (Wire.available() >= 1)
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{
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data = Wire.read();
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retval = true;
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}
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return retval;
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}
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bool ES8388::begin(int32_t sda, int32_t scl, uint32_t frequency)
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{
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bool res = identify(sda, scl, frequency);
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if (res == true)
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{
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/* mute DAC during setup, power up all systems, slave mode */
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL3, 0x04);
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res &= write_reg(ES8388_ADDR, ES8388_CONTROL2, 0x50);
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res &= write_reg(ES8388_ADDR, ES8388_CHIPPOWER, 0x00);
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res &= write_reg(ES8388_ADDR, ES8388_MASTERMODE, 0x00);
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/* power up DAC and enable LOUT1+2 / ROUT1+2, ADC sample rate = DAC sample rate */
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res &= write_reg(ES8388_ADDR, ES8388_DACPOWER, 0x3e);
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res &= write_reg(ES8388_ADDR, ES8388_CONTROL1, 0x12);
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/* DAC I2S setup: 16 bit word length, I2S format; MCLK / Fs = 256*/
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL1, 0x18);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL2, 0x02);
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/* DAC to output route mixer configuration: ADC MIX TO OUTPUT */
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL16, 0x1B);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL17, 0x90);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL20, 0x90);
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/* DAC and ADC use same LRCK, enable MCLK input; output resistance setup */
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL21, 0x80);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL23, 0x00);
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/* DAC volume control: 0dB (maximum, unattenuated) */
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL5, 0x00);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL4, 0x00);
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/* power down ADC while configuring; volume: +9dB for both channels */
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res &= write_reg(ES8388_ADDR, ES8388_ADCPOWER, 0xff);
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL1, 0x88); // +24db
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/* select LINPUT2 / RINPUT2 as ADC input; stereo; 16 bit word length, format right-justified, MCLK / Fs = 256 */
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL2, 0xf0); // 50
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL3, 0x80); // 00
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL4, 0x0e);
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL5, 0x02);
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/* set ADC volume */
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL8, 0x20);
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res &= write_reg(ES8388_ADDR, ES8388_ADCCONTROL9, 0x20);
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/* set LOUT1 / ROUT1 volume: 0dB (unattenuated) */
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL24, 0x1e);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL25, 0x1e);
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/* set LOUT2 / ROUT2 volume: 0dB (unattenuated) */
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL26, 0x1e);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL27, 0x1e);
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/* power up and enable DAC; power up ADC (no MIC bias) */
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res &= write_reg(ES8388_ADDR, ES8388_DACPOWER, 0x3c);
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res &= write_reg(ES8388_ADDR, ES8388_DACCONTROL3, 0x00);
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res &= write_reg(ES8388_ADDR, ES8388_ADCPOWER, 0x00);
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/* set up MCLK) */
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#ifdef FUNC_GPIO0_CLK_OUT1
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0_CLK_OUT1);
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#endif
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WRITE_PERI_REG(PIN_CTRL, 0xFFF0);
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}
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return res;
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}
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/**
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* @brief (un)mute one of the two outputs or main dac output of the ES8388 by switching of the output register bits. Does not really mute the selected output, causes an attenuation.
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* hence should be used in conjunction with appropriate volume setting. Main dac output mute does mute both outputs
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*
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* @param out
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* @param muted
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*/
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void ES8388::mute(const ES8388_OUT out, const bool muted)
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{
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uint8_t reg_addr;
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uint8_t mask_mute;
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uint8_t mask_val;
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switch (out)
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{
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case ES_OUT1:
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reg_addr = ES8388_DACPOWER;
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mask_mute = (3 << 4);
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mask_val = muted ? 0 : mask_mute;
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break;
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case ES_OUT2:
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reg_addr = ES8388_DACPOWER;
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mask_mute = (3 << 2);
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mask_val = muted ? 0 : mask_mute;
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break;
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case ES_MAIN:
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default:
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reg_addr = ES8388_DACCONTROL3;
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mask_mute = 1 << 2;
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mask_val = muted ? mask_mute : 0;
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break;
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}
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uint8_t reg;
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if (read_reg(ES8388_ADDR, reg_addr, reg))
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{
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reg = (reg & ~mask_mute) | (mask_val & mask_mute);
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write_reg(ES8388_ADDR, reg_addr, reg);
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}
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}
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/**
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* @brief Set volume gain for the main dac, or for one of the two output channels. Final gain = main gain + out channel gain
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*
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* @param out which gain setting to control
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* @param vol 0-100 (100 is max)
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*/
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void ES8388::volume(const ES8388_OUT out, const uint8_t vol)
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{
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const uint32_t max_vol = 100; // max input volume value
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const int32_t max_vol_val = out == ES8388_OUT::ES_MAIN ? 96 : 0x21; // max register value for ES8388 out volume
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uint8_t lreg = 0, rreg = 0;
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switch (out)
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{
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case ES_MAIN:
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lreg = ES8388_DACCONTROL4;
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rreg = ES8388_DACCONTROL5;
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break;
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case ES_OUT1:
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lreg = ES8388_DACCONTROL24;
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rreg = ES8388_DACCONTROL25;
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break;
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case ES_OUT2:
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lreg = ES8388_DACCONTROL26;
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rreg = ES8388_DACCONTROL27;
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break;
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}
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uint8_t vol_val = vol > max_vol ? max_vol_val : (max_vol_val * vol) / max_vol;
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// main dac volume control is reverse scale (lowest value is loudest)
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// hence we reverse the calculated value
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if (out == ES_MAIN)
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{
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vol_val = max_vol_val - vol_val;
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}
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write_reg(ES8388_ADDR, lreg, vol_val);
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write_reg(ES8388_ADDR, rreg, vol_val);
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}
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void ES8388::SetVolumeSpeaker(uint8_t vol) {
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vol = vol * 1.6;
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volume(ES_OUT1, vol);
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volume(ES_MAIN, 100);
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}
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void ES8388::SetVolumeHeadphone(uint8_t vol){
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vol = vol * 1.6;
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volume(ES_OUT2, vol);
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volume(ES_MAIN, 100);
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}
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/**
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* @brief Test if device with I2C address for ES8388 is connected to the I2C bus
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*
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* @param sda which pin to use for I2C SDA
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* @param scl which pin to use for I2C SCL
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* @param frequency which frequency to use as I2C bus frequency
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* @return true device was found
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* @return false device was not found
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*/
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bool ES8388::identify(int32_t sda, int32_t scl, uint32_t frequency)
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{
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Wire.begin(sda, scl, frequency);
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Wire.beginTransmission(ES8388_ADDR);
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return Wire.endTransmission() == 0;
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}
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